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Staff Verification Design Engineer

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Skills Required:
Understanding of the fundamentals of computer architecture and system on a chip designs
Experience of block level RTL design and verification for non-trivial FPGA/ASIC developments
Competency in hardware design and verification languages, preferably Verilog and System Verilog / UVM
Experience of development of coverage-driven constrained random test environments
Exposure to all stages of the design cycle: initial concept, specification, implementation and testing, documentation and support
Experience producing specifications and documentation describing complex designs
Experience in planning and managing tasks
Genuine passion for technology, actively following emerging technologies and trends
Excellent interpersonal skills, eager and quick to learn
Self-motivation
Fluency in both written and oral English
Educated to Degree level ideally in a technical field such as Computer science, Electronics engineering or Microelectronic or equivalent experience